BM1398 ASIC Chip

Overview

The BM1398 is a 7nm SHA-256 mining ASIC manufactured by Bitmain, and the workhorse chip of the entire S19 generation. It powered the original Antminer S19, S19 Pro, and S19k Pro — the miners that defined Bitcoin mining from 2020 through 2023 and remain widely deployed across mining operations globally.

The BM1398 was Bitmain's first high-volume 7nm mining ASIC. It established the architectural patterns that all subsequent BM13xx chips would follow: the daisy-chain communication protocol, the domain-based power delivery model, and the PLL-controlled clock distribution scheme. Understanding the BM1398 is foundational to working with any modern Bitmain hashboard.

At approximately 30 J/TH, the BM1398 is the least efficient chip in the current Bitmain lineup, but its massive installed base means it remains one of the most commonly repaired chips in the industry. Replacement BM1398 chips are readily available from component suppliers, and the 7nm process is more forgiving of voltage variation than the newer 5nm designs, making it a good platform for technicians developing their BGA rework skills.

The S19 uses 76 BM1398 chips per hashboard organized into 38 voltage domains (2 chips per domain in the legacy configuration). The S19 Pro increases this to 114 chips with a different domain structure. The S19k Pro uses a further optimized layout. Each variant configures the BM1398 at slightly different voltage and frequency points.

Specifications

Pin Configuration

The BM1398 uses a BGA package that became the template for the entire BM13xx family. It has a moderate ball count and pitch that is accessible for technicians with standard BGA rework equipment.

Power Pins

• VDD — Core power supply (0.31V nominal per chip). In the S19's series-domain configuration, the buck converter provides the aggregate domain voltage and individual chips see a fraction of it. Tight regulation at the domain level is essential.
• VDDIO — I/O power supply (1.8V). Common across the communication bus.
• VSS — Ground connections through multiple BGA balls for thermal and electrical performance.

Communication Pins

• CI — Clock Input. Receives clock from the upstream chip or the hashboard controller (FPGA or ASIC on the control board).
• CO — Clock Output. Feeds clock to the next chip in the daisy chain.
• RI — Receive Input. Serial data from upstream.
• RO — Receive Output. Serial data to downstream.
• BO — Break Out signal. Asserted on internal fault detection. On the S19, the BO chain is monitored by the control board to quickly identify failed chips without polling.

PLL Pins

• XCLK — External clock reference input (25 MHz typical).

// PLL frequency register configuration for BM1398
// IMPORTANT: BM1398 uses postdiv_minus_1 = false
// (different from BM1366/BM1368/BM1370 which use true)
#define BM1398_PLL_FREQ_400M  0x00E0206401
#define BM1398_PLL_FREQ_450M  0x00E0246401
#define BM1398_PLL_FREQ_500M  0x00E0286401
#define BM1398_PLL_FREQ_550M  0x00E02C6401

Common Failure Modes

The BM1398 has been in service longer than any other current-generation Bitmain chip, so its failure modes are well-documented and widely understood.

1. Dead Chip (Enumeration Failure)

The single most common failure. The chip does not respond during chain enumeration, and all downstream chips in the same chain segment are lost.

Diagnosis:

• Measure VDD at the chip pads. On S19 boards with 2-chip domains, check both the domain voltage and the individual chip's share.
• If VDD is correct and the chip still does not enumerate, the die is likely failed. Common after 2–3 years of continuous operation due to electromigration at 7nm.
• Check for physical damage — cracked packages, detached balls (visible under magnification), or discoloration indicating overheating.

Root causes: Electromigration (long-term degradation), power supply transients, thermal cycling fatigue, ESD during handling, and manufacturing defects.

2. Domain Short Circuit

A failed BM1398 shorts VDD to VSS internally, pulling down the entire voltage domain. The domain's buck converter enters overcurrent protection (hiccup mode or shutdown).

Diagnosis:

• With the board powered off, measure resistance across the domain's power rails. A healthy domain shows moderate resistance (tens of ohms); a shorted chip shows near-zero ohms.
• To isolate the shorted chip, remove chips from the domain one at a time. When the short disappears, you have found the failed chip.
• In the S19's 2-chip domain, there are only two suspects, making isolation straightforward.

3. Solder Joint Fatigue

The S19 series has been operating for years, and thermal cycling causes solder ball fatigue. The BM1398's 7nm die generates concentrated heat that expands and contracts the BGA solder joints with each power cycle.

Diagnosis:

• Intermittent chip detection — the chip appears and disappears between enumeration cycles.
• Gently pressing on the chip with an insulated probe while running may temporarily restore the connection, confirming a solder joint issue.
• X-ray inspection reveals cracked or fractured solder balls.

Repair: Reflow the chip in place using hot air. Apply flux around the perimeter and heat to 230°C. This remelts the solder balls and re-establishes the connections. A reflow is often sufficient without full chip replacement.

4. Excessive Power Draw (Latchup)

Rarely, a BM1398 enters a latchup condition where it draws excessive current without producing valid hashes. The domain voltage drops and other chips in the domain are affected.

Diagnosis:

• The domain runs hot but hashrate is zero or near-zero.
• Current measurement on the domain bus shows elevated draw compared to a healthy domain.
• Unlike a dead short, the chip may still partially respond to communication but produces no valid work.

Root cause: Usually triggered by an ESD event or voltage glitch that activates a parasitic thyristor structure in the CMOS logic. Power cycling the board may clear the condition; if it recurs, replace the chip.

Replacement Procedure

The BM1398 is one of the most commonly replaced mining ASICs. Its 7nm BGA package is manageable with standard rework equipment.

For detailed BGA rework techniques, see the BGA Rework Guide.

Found In These Miners

Compare With

• BM1362 — Improved 7nm chip for S19j Pro. Better efficiency (~24.5 J/TH) from the same process node.
• BM1366 — 5nm chip for S19 XP. Major efficiency jump to ~21.5 J/TH.
• BM1368 — 5nm chip for S21. ~17.5 J/TH.
• BM1370 — Latest 5nm chip for S21 Pro. ~15 J/TH — half the power per terahash of the BM1398.

Further Reading

• ASIC Chip Architecture
• Voltage Domains & Regulators
• Clock Distribution & PLL
• Cooling & Thermal Management
• ASIC Chip Comparison